---
title: "NetlistBench：评估大语言模型在 SPICE 网表识别与操作中的可靠性"
source: "arXiv AI/CL/LG（论文）"
source_tier: "t2"
url: "https://arxiv.org/abs/2608.12197v1"
permalink: "https://feed.astralor.com/items/itm_080960891e022b35d9b6ecc0"
published: "2026-08-12T15:51:52.000Z"
score: 76
channel: "tech"
tags: ["EDA","LLM","NetlistBench","SPICE","芯片设计"]
---

# NetlistBench：评估大语言模型在 SPICE 网表识别与操作中的可靠性

## AI 点评

> 这篇论文真正有价值的地方在于把'文本流畅'和'结构正确'彻底分开。如果你正在做芯片设计自动化，别被 LLM 在简单编辑上的高分迷惑——那正是危险区，因为稍复杂的结构操作立刻暴露致命缺陷。建议所有 EDA 工具链的负责人把 NetlistBench 当作基本体检项目。

## 速览

SPICE 网表是芯片仿真验证的核心描述文件，虽然以文本形式存在，但通过拓扑和参数编码了结构化电路对象。NetlistBench 构建了包含 2342 个用例、横跨 24 类任务的结构化评测基准，覆盖参数与连通性识别、编辑、层次化操作、等价性判断和长程复合编辑。评测采用确定性结构感知校验器，对六种非思考模式的 LLM 进行测试，结果显示简单局部编辑准确率达 96% 至 100%，但器件添加降至 41% 至 83%，等价性判断仅为 49% 至 90%。开启推理能显著提升弱模型表现，但无法消除结构保持性失败，且随编辑步数增加性能急剧下降。该研究揭示了网表级可靠性是 LLM 辅助电路设计自动化的独立瓶颈。

## 关键点

- NetlistBench 包含 2342 个用例、24 类任务，覆盖参数识别、连通性编辑、层次化操作、等价性判断与长程复合编辑。
- 评测采用确定性结构感知校验器，避免依赖 LLM 或模糊匹配，实现可复现的自动打分。
- 六种非思考模式 LLM 在简单局部编辑上准确率达 96%-100%，但在器件添加与等价性判断上显著下降。
- 开启推理显著改善弱模型，但无法修复结构保持失败；编辑步数增加时性能急剧衰退。

## 全文

Large Language Models (LLMs) are increasingly used in circuit design workflows, yet their reliability on simulator-facing SPICE netlist recognition and manipulation remains poorly understood and is rarely separated from high-level design reasoning. Although netlists are textual, they encode structured circuit objects through topology and parameters. We present \textbf{NetlistBench}, a structure-verified benchmark for SPICE netlist recognition and manipulation. NetlistBench contains 2,342 cases across 24 task families, covering parameter and connectivity recognition and edits, hierarchical operations, equivalence judgment, and long-horizon compound editing. Model outputs are evaluated by a deterministic structure-aware oracle. Across six non-thinking LLMs, performance varies substantially with operation-level structural complexity. Simple local edits reach $96\%$--$100\%$ accuracy, while device addition drops to $41\%$--$83\%$ and equivalence judgment to $49\%$--$90\%$. Enabling reasoning substantially improves weaker models but does not eliminate structure-preservation failures, with performance still degrading sharply as the edit horizon increases. NetlistBench identifies netlist reliability as a distinct bottleneck for trustworthy LLM-based circuit design automation.

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