---
title: "NIFA: Nonlinear IMC Enhanced FPGA for Efficient ML Inference"
source: "arXiv AI/CL/LG（论文）"
source_tier: "t2"
url: "https://arxiv.org/abs/2607.15123v1"
permalink: "https://feed.astralor.com/items/itm_aaf87fdd1ed942b733545049"
published: "2026-07-16T15:32:44.000Z"
score: 79
channel: "tech"
tags: ["Analog Content-Addressable Memory","FPGA","In-Memory Computing","ReRAM","Transformer Inference","Energy Efficiency Optimization"]
---

# NIFA: Nonlinear IMC Enhanced FPGA for Efficient ML Inference

## AI commentary

> This NIFA paper caught my eye—it not only solves the ADC power bottleneck but more critically extends IMC's applicability from CNNs to Transformers. For teams deploying large-model inference on FPGAs, this direction deserves deep exploration. Breakthroughs in hardware often have more fundamental impact than software optimizations.

## At a glance

Conventional FPGA in-memory computing (IMC) blocks support only static-weight VMM, leaving nonlinear operations and DIMM to the fabric, while ADCs consume over 70% area and power. This paper proposes NIFA: an ADC-free IMC block using analog content-addressable memories (ACAMs) that natively perform nonlinear operations; FPGA-aware design-space exploration optimizes crossbar dimensions; ACAMs enable DIMM for attention computation. On CNN and Transformer benchmarks, energy efficiency improves up to 40× and 1.9×, area efficiency up to 4.1× and 2.5×, respectively.

## Key points

- Replacing ADCs with ACAMs eliminates the most power- and area-hungry component while enabling native nonlinear operations inside the block.
- First to extend IMC to dynamic matrix-matrix multiplication (DIMM), allowing Transformer attention to benefit from IMC.
- FPGA-aware design-space exploration balances area, flexibility, and DL performance.
- Significant energy and area efficiency gains on both CNN and Transformer benchmarks, with robust gains on long input sequences.

## Full text

Recent FPGAs have improved deep learning (DL) inference efficiency through dedicated tensor blocks and in-BRAM computation. ReRAM-based analog in-memory computing (IMC) pushes efficiency further, offering an order-of-magnitude improvement in compute density and energy efficiency over conventional digital logic by performing vector-matrix multiplication (VMM) directly within the ReRAM crossbar; prior work has integrated such IMC blocks into FPGAs for DL inference. However, conventional IMC designs support only static-weight VMM, leaving nonlinear operations and dynamic matrix-matrix multiplication (DIMM) to the FPGA fabric. As a result, the benefits of IMC are largely confined to static-weight models, whereas Transformer-based models, which rely on frequent nonlinear and DIMM operations, gain only limited improvement. Moreover, the ADCs within each IMC block consume more than 70% of its area and power, further limiting system efficiency and scalability. To address these limitations, we propose a novel FPGA architecture that integrates an ADC-free IMC block, replacing the conventional ADC with analog content-addressable memories (ACAMs) that natively perform nonlinear operations inside the block. To fully exploit this block, we conduct an FPGA-aware design-space exploration that determines optimal crossbar dimensions while balancing FPGA area, flexibility, and DL performance, and we develop an efficient mapping that leverages ACAMs to carry out DIMM operations, extending the applicability of IMC to attention computation. On CNN and Transformer-based benchmarks, the proposed architecture achieves up to 40x and 1.9x higher energy efficiency and 4.1x and 2.5x higher area efficiency, respectively. Overall, it significantly improves FPGA DL inference efficiency and sustains robust gains on Transformer-based workloads across long input sequences, advancing domain-specialized FPGA design.

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